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SPAA
2000
ACM
14 years 1 months ago
Compact, multilayer layout for butterfly fat-tree
Modern VLSI processing supports a two-dimensional surface for active devices along with multiple stacked layers of interconnect. With the advent of planarization, the number of la...
André DeHon
GLVLSI
1998
IEEE
169views VLSI» more  GLVLSI 1998»
14 years 2 months ago
On the Characterization of Multi-Point Nets in Electronic Designs
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
Dirk Stroobandt, Fadi J. Kurdahi
VLSI
2010
Springer
13 years 4 months ago
Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs
Although local biasing of components used in an analog circuit is shown to be a very attractive design methodology, significantly simplifying the design procedure [3], it makes the...
Reza Hashemian
VLSID
2006
IEEE
148views VLSI» more  VLSID 2006»
14 years 10 months ago
Efficient Design and Analysis of Robust Power Distribution Meshes
With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC d...
Puneet Gupta, Andrew B. Kahng
DATE
2004
IEEE
118views Hardware» more  DATE 2004»
14 years 1 months ago
Distributed Multimedia System Design: A Holistic Perspective
Multimedia systems play a central part in many human activities. Due to the significant advances in the VLSI technology, there is an increasing demand for portable multimedia appl...
Radu Marculescu, Massoud Pedram, Jörg Henkel