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ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 1 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
IJON
2007
184views more  IJON 2007»
13 years 8 months ago
Convex incremental extreme learning machine
Unlike the conventional neural network theories and implementations, Huang et al. [Universal approximation using incremental constructive feedforward networks with random hidden n...
Guang-Bin Huang, Lei Chen
IEEEPACT
2005
IEEE
14 years 2 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
JELIA
2004
Springer
14 years 1 months ago
Practical Reasoning for Uncertain Agents
Logical formalisation of agent behaviour is desirable, not only in order to provide a clear semantics of agent-based systems, but also to provide the foundation for sophisticated r...
Nivea de Carvalho Ferreira, Michael Fisher, Wiebe ...
EUROSYS
2009
ACM
14 years 5 months ago
Privacy-preserving browser-side scripting with BFlow
Some web sites provide interactive extensions using browser scripts, often without inspecting the scripts to verify that they are benign and bug-free. Others handle users’ conď¬...
Alexander Yip, Neha Narula, Maxwell N. Krohn, Robe...