87 search results - page 5 / 18 » When is it better not to look ahead |
MICRO
2002
IEEE
13 years 11 months ago
2002
IEEE
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
DAC
2005
ACM
14 years 7 months ago
2005
ACM
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
ESEM
2009
ACM
14 years 1 months ago
2009
ACM
Decisions on “Who should fix this bug” have substantial impact on the duration of the process and its results. In this paper, optimized strategies for the assignment of the ...
ARVLSI
2001
IEEE
13 years 10 months ago
2001
IEEE
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
CDC
2010
IEEE
12 years 10 months ago
2010
IEEE
— Preview Control design is proposed in order to reduce the settling time of Dual-Stage Actuators (DSA’s). It is shown that a significantly better performance is achieved by e...