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PATMOS
2004
Springer
14 years 2 months ago
Sleepy Stack Reduction of Leakage Power
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption as...
Jun-Cheol Park, Vincent John Mooney III, Philipp P...
CVPR
2010
IEEE
14 years 2 months ago
Minimum length in the tangent bundle as a model for curve completion
The phenomenon of visual curve completion, where the visual system completes the missing part (e.g., due to occlusion) between two contour fragments, is a major problem in percept...
Guy Ben-Yosef, Ohad Ben Shahar
CVPR
2003
IEEE
14 years 2 months ago
Analyzing Appearance and Contour Based Methods for Object Categorization
Object recognition has reached a level where we can identify a large number of previously seen and known objects. However, the more challenging and important task of categorizing ...
Bastian Leibe, Bernt Schiele
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
14 years 2 months ago
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
DFT
2003
IEEE
64views VLSI» more  DFT 2003»
14 years 2 months ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...