564 search results - page 105 / 113 » Wireplanning in logic synthesis |
LOPSTR
2001
Springer
13 years 11 months ago
2001
Springer
Abstract. Deforestation is a well-known program transformation technique which eliminates intermediate data structures that are passed between functions. One of its weaknesses is t...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
MSE
1999
IEEE
13 years 11 months ago
1999
IEEE
Intellectual property IP blocks are being created for reuse and marketed as a means of reducing the development time of complex designs. This in turn leads to a reduction in time ...
IFM
1999
Springer
13 years 11 months ago
1999
Springer
The feature interaction problem is prominent in telephone service development. Through a number of case studies, we have discovered that no single semantic framework is suitable f...
ITC
1996
IEEE
13 years 11 months ago
1996
IEEE
Orthogonal scan paths, which follow the path of the data flow, can be used in data path designs to reduce the test overhead -- area, delay and test application time -- by sharing ...