564 search results - page 44 / 113 » Wireplanning in logic synthesis |
ISLPED
1995
ACM
14 years 1 days ago
1995
ACM
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
CADE
2010
Springer
13 years 9 months ago
2010
Springer
In order to support the verification of programs, verification tools such as ACL2 or Isabelle try to extract suitable induction axioms from the definitions of terminating, recursiv...
JAR
2008
13 years 8 months ago
2008
This article presents detailed implementations of quantifier elimination for both integer and real linear arithmetic for theorem provers. The underlying algorithms are those by Coo...
ICML
1989
IEEE
14 years 16 days ago
1989
IEEE
Logic programming provides a uniform framework in which all aspects of explanation-based generalization and learning may be defined and carried out, but first-order Horn logic i...
DATE
2009
IEEE
14 years 11 days ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...