We describe an optimization method for combinational and sequential logic networks, with emphasis on scalability and the scope of optimization. The proposed resynthesis (a) is cap...
Alan Mishchenko, Robert K. Brayton, Jie-Hong Rolan...
A new implementation for minimally redundant radix-4 floating-point SRT division/square-root (division/sqrt) with the recurrence in the signed-digit format is introduced. The imp...
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
The automata-theoretic approach to linear temporal logic uses the theory of automata as a unifying paradigm for program specification, verification, and synthesis. Both programs ...
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...