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HPCA
2008
IEEE
14 years 7 months ago
Runahead Threads to improve SMT performance
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
Tanausú Ramírez, Alex Pajuelo, Olive...
HPCA
2005
IEEE
14 years 7 months ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner
CODES
2006
IEEE
14 years 1 months ago
A bus architecture for crosstalk elimination in high performance processor design
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
MICRO
2005
IEEE
170views Hardware» more  MICRO 2005»
14 years 1 months ago
The TM3270 Media-Processor
We present the TM3270 media-processor, the latest TriMedia VLIW processor, tuned to address the performance demands of standard definition video processing, combined with embedded...
Jan-Willem van de Waerdt, Stamatis Vassiliadis, Sa...
DSN
2005
IEEE
13 years 9 months ago
Microarchitecture-Based Introspection: A Technique for Transient-Fault Tolerance in Microprocessors
The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
Moinuddin K. Qureshi, Onur Mutlu, Yale N. Patt