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» X-architecture placement based on effective wire models
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ICPADS
1998
IEEE
13 years 11 months ago
The XBW Model for Dependable Real-Time Systems
This paper presents a new conceptual model, the XBWModel. Distributed computing is becoming a cost effective way to implement safety critical control systems. To support the devel...
Vilgot Claesson, Stefan Poledna, Jan Söderber...
IPPS
2005
IEEE
14 years 1 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
ISCAS
2007
IEEE
138views Hardware» more  ISCAS 2007»
14 years 1 months ago
A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits
-- In interconnect-dominated designs, the ability to minimize layout-induced parasitic effects is crucial for rapid design closure. Deep sub-micron effects and ubiquitous interfere...
Henry H. Y. Chan, Zeljko Zilic
GLVLSI
2000
IEEE
110views VLSI» more  GLVLSI 2000»
13 years 12 months ago
A sensitivity based placer for standard cells
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
ICCAD
2007
IEEE
124views Hardware» more  ICCAD 2007»
14 years 4 months ago
3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits
Abstract— Thermal issues are a primary concern in the threedimensional (3D) integrated circuit (IC) design. Temperature, area, and wire length must be simultaneously optimized du...
Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. ...