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» X-architecture placement based on effective wire models
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ISCAS
2008
IEEE
117views Hardware» more  ISCAS 2008»
14 years 2 months ago
Electrical modeling and characterization of 3-D vias
Abstract— Electrical characterization of the resistance, capacitance, and inductance of inter-plane 3-D vias is presented in this paper. Both capacitive and inductive coupling be...
Ioannis Savidis, Eby G. Friedman
ISQED
2009
IEEE
117views Hardware» more  ISQED 2009»
14 years 2 months ago
Adaptive voltage controlled nanoelectronic addressing for yield, accuracy and resolution
An outstanding challenge for realizing nanoelectronic systems is nano-interface design, i.e., how to precisely access a nanoscale wire in an array for communication between a nano...
Bao Liu
SIGCOMM
2006
ACM
14 years 1 months ago
Measurement-based models of delivery and interference in static wireless networks
We present practical models for the physical layer behaviors of packet reception and carrier sense with interference in static wireless networks. These models use measurements of ...
Charles Reis, Ratul Mahajan, Maya Rodrig, David We...
ISLPED
2000
ACM
68views Hardware» more  ISLPED 2000»
13 years 12 months ago
Noise-aware power optimization for on-chip interconnect
Realization of high-performance domino logic depends strongly on energy-efficient and noise-tolerant interconnect design in ultra deep sub-micron processes. We characterize the c...
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L....
ISCAS
1999
IEEE
146views Hardware» more  ISCAS 1999»
13 years 12 months ago
Optimization of CMOS MEMS microwave power sensors
- Micromachined power sensors with operation up to 50 GHz were recently achieved in CMOS technology [1]. To improve their sensitivity and signal-to-noise ratio, while maintaining m...
V. Milanovic, M. Hopcroft, C. A. Zincke, M. Gaitan...