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» XTR Implementation on Reconfigurable Hardware
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FPL
2007
Springer
96views Hardware» more  FPL 2007»
14 years 2 months ago
Implementation of a 2-D 8x8 IDCT on the Reconfigurable Montium Core
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
Lodewijk T. Smit, Gerard K. Rauwerda, Albert Molde...
FPL
2007
Springer
94views Hardware» more  FPL 2007»
14 years 2 months ago
A Many-core Implementation based on the Reconfigurable Mesh Model
The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus...
Heiner Giefers, Marco Platzner
ARC
2007
Springer
102views Hardware» more  ARC 2007»
14 years 14 days ago
Reconfigurable Hardware Acceleration of Canonical Graph Labelling
Many important algorithms in computational biology and related subjects rely on the ability to extract and to identify sub-graphs of larger graphs; an example is to find common fun...
David B. Thomas, Wayne Luk, Michael Stumpf
DATE
2008
IEEE
82views Hardware» more  DATE 2008»
14 years 2 months ago
A Triple-Mode Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications
This paper presents the implementation and experimental characterization of a reconfigurable ΣΔ modulator intended for multi-mode wireless receivers that is capable to perform t...
Alonso Morgado, Rocio del Río, José ...
FPL
2008
Springer
175views Hardware» more  FPL 2008»
13 years 10 months ago
File system access from reconfigurable FPGA hardware processes in BORPH
This paper presents the design and implementation of BORPH's kernel file system layer that provides FPGA processes direct access to the general file system. Using a semantics...
Hayden Kwok-Hay So, Robert W. Brodersen