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MICRO
1997
IEEE
110views Hardware» more  MICRO 1997»
13 years 12 months ago
The Design and Performance of a Conflict-Avoiding Cache
High performance architectures depend heavily on efficient multi-level memory hierarchies to minimize the cost of accessing data. This dependence will increase with the expected i...
Nigel P. Topham, Antonio González, Jos&eacu...
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
13 years 11 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
HIPC
1999
Springer
13 years 12 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller
ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
13 years 12 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
APCSAC
2005
IEEE
13 years 9 months ago
Cache Leakage Management for Multi-programming Workloads
Chun-Yang Chen, Chia-Lin Yang, Shih-Hao Hung