Sciweavers

1000 search results - page 192 / 200
» Yield-Aware Cache Architectures
Sort
View
PDP
2010
IEEE
14 years 4 hour ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
IPPS
1999
IEEE
13 years 12 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
ICDE
2005
IEEE
122views Database» more  ICDE 2005»
14 years 9 months ago
Uncovering Database Access Optimizations in the Middle Tier with TORPEDO
A popular architecture for enterprise applications is one of a stateless object-based server accessing persistent data through Object-Relational mapping software. The reported ben...
Bruce E. Martin
ICDE
2000
IEEE
197views Database» more  ICDE 2000»
14 years 9 months ago
SQLServer for Windows CE - A Database Engine for Mobile and Embedded Platforms
This paper presents an overview of Microsoft SQLServer for Windows CE. This is a database engine designed for mobile and embedded applications. The focus of the presentation is on...
Praveen Seshadri, Phil Garrett
DAC
2004
ACM
14 years 8 months ago
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption using the computational workload decomposition. Th...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram