711 search results - page 30 / 143 » Yield-aware placement optimization |
114
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ICCD
2007
IEEE
15 years 11 months ago
2007
IEEE
DSM and nanometer VLSI designs are subject to an increasingly significant thermal effect on VLSI circuit lifetime and performance variation, which can be effectively subdued by V...
120
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ICCAD
1991
IEEE
15 years 6 months ago
1991
IEEE
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
107
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EOR
2007
15 years 2 months ago
2007
In a recent paper, Savas, Batta and Nagi [14] consider the optimal placement of a finite-sized facility in the presence of arbitrarily-shaped barriers under rectilinear travel. T...
103
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ISCA
1998
IEEE
15 years 6 months ago
1998
IEEE
This paper investigates the placement of data and parity on redundant disk arrays. Declustered organizations have been traditionally used to achieve fast reconstruction of a faile...
129
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ASPDAC
2006
ACM
15 years 8 months ago
2006
ACM
− In this paper, we present a new timing-driven placement algorithm, which attempts to minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed th...