711 search results - page 32 / 143 » Yield-aware placement optimization |
109
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ICCAD
2001
IEEE
15 years 11 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
115
Voted
NPC
2005
Springer
15 years 8 months ago
2005
Springer
One major factor that heavily affects the performance of a content distribution network (CDN) is placement of the surrogates. Previous works take a network-centric approach and con...
123
Voted
ISPD
1997
ACM
15 years 6 months ago
1997
ACM
The inherent distortion of the structural regularity of VLSI datapaths after logic optimization has until now precluded dense regular layouts of optimized datapaths despite their ...
126
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ISPD
2010
ACM
15 years 9 months ago
2010
ACM
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
102
Voted
ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...