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» Zero Detect-Based Low Power Registers File Access
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CDES
2006
74views Hardware» more  CDES 2006»
13 years 8 months ago
Zero Detect-Based Low Power Registers File Access
- With the intention of reduce significantly the energy that wastes away when having a read or write access to the register file, since the technique Zero Detect diminishes the tra...
Moises Zarate, Oscar Camacho Nieto, Luis A. Villa ...
HPCA
2005
IEEE
14 years 7 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
14 years 7 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
ASPLOS
2000
ACM
13 years 11 months ago
Communication Scheduling
The high arithmetic rates of media processing applications require architectures with tens to hundreds of functional units, multiple register files, and explicit interconnect betw...
Peter R. Mattson, William J. Dally, Scott Rixner, ...
TVLSI
2010
13 years 1 months ago
A Low-Power DSP for Wireless Communications
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudg...