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ARITH
2009
IEEE
15 years 7 months ago
A New Binary Floating-Point Division Algorithm and Its Software Implementation on the ST231 Processor
This paper deals with the design and implementation of low latency software for binary floating-point division with correct rounding to nearest. The approach we present here targe...
Claude-Pierre Jeannerod, Herve Knochel, Christophe...
ARITH
2009
IEEE
15 years 10 months ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
ARITH
2009
IEEE
15 years 10 months ago
Challenges in Automatic Optimization of Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
Ajay K. Verma, Philip Brisk, Paolo Ienne
138
Voted
ARITH
2009
IEEE
15 years 10 months ago
Fully Redundant Decimal Arithmetic
Hardware implementation of all the basic radix-10 arithmetic operations is evolving as a new trend in the design and implementation of general purpose digital processors. Redundan...
Saeid Gorgin, Ghassem Jaberipur
122
Voted
ARITH
2009
IEEE
15 years 10 months ago
A 32-bit Decimal Floating-Point Logarithmic Converter
This paper presents a new design and implementation of a 32-bit decimal floating-point (DFP) logarithmic converter based on the digit-recurrence algorithm. The converter can calc...
Dongdong Chen, Yu Zhang, Younhee Choi, Moon Ho Lee...