Sciweavers

2107 search results - page 414 / 422
» b 2007
Sort
View
CASES
2007
ACM
13 years 11 months ago
Facilitating compiler optimizations through the dynamic mapping of alternate register structures
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
Chris Zimmer, Stephen Roderick Hines, Prasad Kulka...
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
13 years 11 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
ISPD
2007
ACM
151views Hardware» more  ISPD 2007»
13 years 11 months ago
Pattern sensitive placement for manufacturability
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
Shiyan Hu, Jiang Hu
ISPD
2007
ACM
128views Hardware» more  ISPD 2007»
13 years 11 months ago
X-architecture placement based on effective wire models
In this paper, we derive the X-half-perimeter wirelength (XHPWL) model for X-architecture placement and explore the effects of three different wire models on X-architecture plac...
Tung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang
ISPD
2007
ACM
124views Hardware» more  ISPD 2007»
13 years 11 months ago
Accurate power grid analysis with behavioral transistor network modeling
In this paper, we propose fast and efficient techniques to analyze the power grid with accurate modeling of the transistor network. The solution techniques currently available for...
Anand Ramalingam, Giri Devarayanadurg, David Z. Pa...