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CSREAESA
2004
14 years 7 days ago
Switching Activity Minimization in Combinational Logic Design
: In this paper we focus on the reduction of switching activity in combinational logic circuits. An algorithmic approach using k-map has been proposed which modifies the normal opt...
R. V. Menon, S. Chennupati, Naveen K. Samala, Damu...
CSREAESA
2004
14 years 7 days ago
Approaches for Monitoring Vectors on Microprocessor Buses
This paper introduces two new methods for observing and recording the vectors that have been asserted on a bus. The first is a software approach that uses a novel data structure s...
Hector Arteaga, Hussain Al-Asaad
CSREAESA
2004
14 years 7 days ago
Flexible Internet Based Diagnostics of Embedded Systems
The remote diagnostics of faults and operating states of technical equipment offers increased benefits and cost advantages for consumers and manufacturers. These advantages can al...
Jan Traumueller
CSREAESA
2004
14 years 7 days ago
CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks
- The model of a simple perceptron using phase-encoded inputs and complex-valued weights is presented. Multilayer two-input and three-input complex-valued neurons (CVNs) are implem...
Howard E. Michel, David Rancour, Sushanth Iringent...
CSREAESA
2004
14 years 7 days ago
A Distributed FIFO Scheme for System on Chip Inter-Component Communication
Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as fast as the device...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...