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CSREAESA
2004
13 years 9 months ago
Switching Activity Minimization in Combinational Logic Design
: In this paper we focus on the reduction of switching activity in combinational logic circuits. An algorithmic approach using k-map has been proposed which modifies the normal opt...
R. V. Menon, S. Chennupati, Naveen K. Samala, Damu...
CSREAESA
2004
13 years 9 months ago
Survey and Evaluation of Low-Power Full-Adder Cells
In this paper, we survey various designs of low-power full-adder cells from conventional CMOS to really inventive XOR-based designs. We further describe simulation experiments tha...
Ahmed Sayed, Hussain Al-Asaad
CSREAESA
2006
13 years 9 months ago
Chip OS: new architecture for next generation embedded system
Nowadays embedded system, hardware/software technology has progressed prosperously. In many field of industrial manufacture and people life, embedded system is indispensable. Rece...
Tianzhou Chen, Yi Lian, Wei Hu
CSREAESA
2006
13 years 9 months ago
Field-programmable Gate Array in Miniature Ion Mobility Spectrometer Sensor System
This paper presents the use of field-programmable gate array (FPGA) in a miniature Ion Mobility Spectrometer (IMS) sensor system. This IMS sensor is for detection of subsurface ga...
Jon Cole, S. M. Loo, Robert Youngberg, Jake Baker,...
CSREAESA
2006
13 years 9 months ago
Novel and Efficient 4: 2 and 5: 2 Compressors with Minimum Number of Transistors Designed for Low-Power Operations
This paper proposes efficient and optimal 4:2 and 5:2 compressors. The compressors are highly optimized in terms of transistor count. These designs have the principle advantage th...
Pallavi Devi Gopineedi, Himanshu Thapliyal, M. B. ...