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DATE
2000
IEEE
119views Hardware» more  DATE 2000»
13 years 11 months ago
Bus Access Optimization for Distributed Embedded Systems Based on Schedulability Analysis
We present an approach to bus access optimization and schedulability analysis for the synthesis of hard real-time distributed embedded systems. The communication model is based on...
Paul Pop, Petru Eles, Zebo Peng
DATE
2000
IEEE
85views Hardware» more  DATE 2000»
13 years 11 months ago
All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses
This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers,...
Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Na...
NOMS
2000
IEEE
13 years 11 months ago
POWER prototype: towards integrated policy-based management
ot only high level description of abstract policy, but also enables such policy to be refined and eventually mapped into an appropriate configuration for controlling devices in the...
Marco Casassa Mont, Adrian Baldwin, Cheh Goh
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
13 years 11 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
DSN
2000
IEEE
13 years 11 months ago
Implementing e-Transactions with Asynchronous Replication
ts the abstraction of e-Transactions in three-tier architectures. Three-tier architectures are typically Internetoriented architectures, where the end-user interacts with frontend ...
Svend Frølund, Rachid Guerraoui