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FCCM
1998
IEEE
99views VLSI» more  FCCM 1998»
14 years 1 months ago
FPGA-Based Architecture Evaluation of Cryptographic Coprocessors for Smartcards
In 1996, about 600 million IC-cards were manufactured worldwide. Due to very small die sizes (max. 25 mm2 ) smartcards encounter more severe restrictions than conventional coproces...
Hagen Ploog, Dirk Timmermann
ISMVL
1998
IEEE
113views Hardware» more  ISMVL 1998»
14 years 1 months ago
Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic
The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiplevalued LUT can be implemented using both current-mode and voltage-mode ...
Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak
TC
1998
13 years 9 months ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
RSP
1998
IEEE
110views Control Systems» more  RSP 1998»
14 years 1 months ago
Rapid Design of Discrete Orthonormal Wavelet Transforms
A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved co...
Shahid Masud, John V. McCanny
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
14 years 1 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings