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EUROMICRO
1999
IEEE
14 years 1 months ago
The X-MatchLITE FPGA-Based Data Compressor
This paper introduces a hardware amenable algorithm for lossless data compression and a highly integrable architecture which enables Gbit/s compression using contemporary ASIC tec...
Jose Luis Nunez, Claudia Feregrino, Simon Jones, S...
FPGA
1999
ACM
124views FPGA» more  FPGA 1999»
14 years 1 months ago
Don't Care Discovery for FPGA Configuration Compression
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. The configuration compression algorithm presented in our prev...
Zhiyuan Li, Scott Hauck
FPGA
1999
ACM
130views FPGA» more  FPGA 1999»
14 years 1 months ago
Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks
The Embedded System Block (ESB) of the APEX20K programmable logic device family from Altera Corporation includes the capability of implementing product term macrocells in addition...
Frank Heile, Andrew Leaver
FPGA
1999
ACM
155views FPGA» more  FPGA 1999»
14 years 1 months ago
FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density
In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the best distribution of routing segment lengths and the best mix of pass transist...
Vaughn Betz, Jonathan Rose
RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
14 years 1 months ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier