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FPL
2003
Springer
76views Hardware» more  FPL 2003»
14 years 3 months ago
Quark Routing
With inherent problem complexity, ever increasing instance size and ever decreasing layout area, there is need in physical design for improved heuristics and algorithms. In this in...
Sean T. McCulloch, James P. Cohoon
ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
14 years 6 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje
FPGA
2003
ACM
137views FPGA» more  FPGA 2003»
14 years 3 months ago
Design of FPGA interconnect for multilevel metalization
How does multilevel metalization impact the design of FPGA interconnect? The availability of a growing number of metal layers presents the opportunity to use wiring in the thirddi...
Raphael Rubin, André DeHon
IPPS
2003
IEEE
14 years 3 months ago
Architectural Frameworks for MPP Systems on a Chip
Advances in fabrication techniques are now enabling new hybrid CPU/FPGA computing resources to be integrated onto a single chip. While these new hybrids promise significant perfor...
David L. Andrews, Douglas Niehaus
FPGA
2003
ACM
167views FPGA» more  FPGA 2003»
14 years 3 months ago
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, R...