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FPL
2005
Springer
226views Hardware» more  FPL 2005»
14 years 3 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...
ISCAS
2005
IEEE
159views Hardware» more  ISCAS 2005»
14 years 3 months ago
A low power FPGA routing architecture
— Significant headway has been made in logic density and performance of FPGAs in the past decade. Power efficiency of FPGA architectures is arguably the next most important crite...
Somsubhra Mondal, Seda Ogrenci Memik
DAC
2005
ACM
13 years 11 months ago
Exploring technology alternatives for nano-scale FPGA interconnects
Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular. With their regular structures, they are particularly amenable to scaling to smaller technologies. On the ...
Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane I...
ITCC
2005
IEEE
14 years 3 months ago
FPGA Implementations of the ICEBERG Block Cipher
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
François-Xavier Standaert, Gilles Piret, Ga...
CHES
2005
Springer
146views Cryptology» more  CHES 2005»
14 years 3 months ago
AES on FPGA from the Fastest to the Smallest
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
Tim Good, Mohammed Benaissa