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FPL
2005
Springer
110views Hardware» more  FPL 2005»
14 years 3 months ago
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
Robert G. Dimond, Oskar Mencer, Wayne Luk
FPL
2005
Springer
115views Hardware» more  FPL 2005»
14 years 3 months ago
Statistical Power Estimation for FPGA
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
Elias Todorovich, Fabian Angarita, Javier Valls, E...
ISNN
2005
Springer
14 years 3 months ago
FPGA Realization of a Radial Basis Function Based Nonlinear Channel Equalizer
In this paper we propose a radial basis function (RBF) neural network for nonlinear time-invariant channel equalizer. The RBF network model has a three-layer structure which is com...
Poyueh Chen, Hungming Tsai, ChengJian Lin, ChiYung...
ICCD
2005
IEEE
102views Hardware» more  ICCD 2005»
14 years 6 months ago
Monitoring Temperature in FPGA based SoCs
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher ondie temperatu...
Sivakumar Velusamy, Wei Huang, John Lach, Mircea R...
DAC
2005
ACM
14 years 10 months ago
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...
Kenneth Eguro, Scott Hauck, Akshay Sharma