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    ICANN
    2005
    Springer
    116views Neural Networks» more  ICANN 2005»
    A Real-Time, FPGA Based, Biologically Plausible Neural Network Processor
    14 years 3 months ago
    A Real-Time, FPGA Based, Biologically Plausible Neural Network Processor
    Download  www.abrg.group.shef.ac.uk
    Abstract. A real-time, large scale, leaky-integrate-and-fire neural network processor realized using FPGA is presented. This has been designed, as part of a collaborative project,...
    Martin J. Pearson, Ian Gilhespy, Kevin N. Gurney, ...
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    DAC
    2005
    ACM
    142views Computer Architecture» more  DAC 2005»
    Matlab as a development environment for FPGA design
    13 years 11 months ago
    Matlab as a development environment for FPGA design
    Download  videos.dac.com
    In this paper we discuss an efficient design flow from Matlab® to FPGA. Employing Matlab for algorithm research and as system level language allows efficient transition from algo...
    Tejas M. Bhatt, Dennis McCain
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    DAC
    2005
    ACM
    109views Computer Architecture» more  DAC 2005»
    Device and architecture co-optimization for FPGA power reduction
    14 years 10 months ago
    Device and architecture co-optimization for FPGA power reduction
    Download  www.ee.ucla.edu
    Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
    Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
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    FPGA
    2005
    ACM
    156views FPGA» more  FPGA 2005»
    Design of programmable interconnect for sublithographic programmable logic arrays
    14 years 3 months ago
    Design of programmable interconnect for sublithographic programmable logic arrays
    Download  ic.ese.upenn.edu
    Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
    André DeHon
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    FPL
    2005
    Springer
    96views Hardware» more  FPL 2005»
    An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform
    14 years 3 months ago
    An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform
    Download  vlsi.ee.duth.gr
    In this paper, the EX-VPR tool, which used for architecture level exploration, is presented. This tool belongs to an integrated framework (MEANDER) for mapping applications into a...
    K. Siozios, Konstantinos Tatas, George Koutroumpez...
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