Sciweavers

183 search results - page 20 / 37
» fpga 2005
Sort
View
VTS
2005
IEEE
90views Hardware» more  VTS 2005»
14 years 3 months ago
Soft Error Mitigation for SRAM-Based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs, since SEUs in configuration bits of FPGAs result in permanent errors in the mapped...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
CHES
2005
Springer
117views Cryptology» more  CHES 2005»
14 years 3 months ago
DPA Leakage Models for CMOS Logic Circuits
In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate...
Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa
FCCM
2005
IEEE
151views VLSI» more  FCCM 2005»
14 years 3 months ago
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
FCCM
2005
IEEE
142views VLSI» more  FCCM 2005»
14 years 3 months ago
FPGA-Based Vector Processing for Solving Sparse Sets of Equations
The solution to a set of sparse linear equations Ax = b, where A is an n×n sparse matrix and b is an n-element vector, can be obtained using the W-matrix method. An enhanced vect...
Muhammad Z. Hasan, Sotirios G. Ziavras
RSP
2005
IEEE
14 years 3 months ago
Prototyping a Residential Gateway Using Xilinx ISE
This paper presents a residential gateway (RG) prototyping process using Xilinx Integrated Software Environment (ISE) version 6.1i. The RG was designed for broadband residential m...
S. W. Song, J. D. Zheng, William B. Gardner