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FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
14 years 3 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 3 months ago
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Ca...
RTCSA
2005
IEEE
14 years 3 months ago
FPGA-Based Content Protection System for Embedded Consumer Electronics
We propose a new architecture for a content protection system that conceals confidential data and algorithms in an FPGA as electrical circuits. This architecture is designed for a...
Hiroyuki Yokoyama, Kenji Toda
ISLPED
2005
ACM
91views Hardware» more  ISLPED 2005»
14 years 3 months ago
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs
As FPGAs enter the nanometer regime, several modifications are needed to reduce the increasing leakage power dissipation. Hence, this work presents some modifications to the FPG...
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
FPL
2005
Springer
98views Hardware» more  FPL 2005»
14 years 3 months ago
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
Gareth W. Morris, George A. Constantinides, Peter ...