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DATE
2006
IEEE
96views Hardware» more  DATE 2006»
14 years 2 months ago
A methodology for FPGA to structured-ASIC synthesis and verification
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
Michael Hutton, Richard Yuan, Jay Schleicher, Greg...
APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
13 years 10 months ago
A Multi-Context FPGA Using a Floating-Gate-MOS Functional Pass-Gate and Its CAD Environment
Abstract-- Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory pl...
Masanori Hariyama, Michitaka Kameyama
DATE
2006
IEEE
80views Hardware» more  DATE 2006»
14 years 2 months ago
Energy-efficient FPGA interconnect design
Despite recent advances in FPGA devices and embedded cores, their deployment in commercial products remains rather limited due to practical constraints on, for example, cost, size...
Maurice Meijer, Rohini Krishnan, Martijn T. Benneb...
DATE
2006
IEEE
135views Hardware» more  DATE 2006»
14 years 2 months ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...
DSD
2006
IEEE
89views Hardware» more  DSD 2006»
14 years 2 months ago
FPGA Implementation of Embedded Cruise Control and Anti-Collision Radar
The ModEasy project seeks to develop techniques and software tools to aid in the development of reliable microprocessor based electronic (embedded) systems using advanced developm...
Sébastien Le Beux, Philippe Marquet, Ouassi...