In this paper we introduce a new method to identify IP cores in an FPGA by analyzing the content of lookup tables. This techniques can be used to identify registered cores for IP ...
— We propose a VLSI architecture for the single-chip realization of 2D spatio-temporal IIR digital filters, consisting of a meshed connection of concurrent identical vector-proce...
The wavelet transform is a very popular tool in engineering for signal analysis. With respect to image compression, the new JPEG 2000 image standard incorporates wavelet transform...
Many real-time image processing applications are confronted with performance limitations when implemented in software. The skin segmentation algorithm utilized in hand gesture rec...
Bart de Ruijsscher, Georgi Gaydadjiev, Jeroen Lich...
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...