This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
Temporal partitioning techniques are useful to implement large and complex applications, which can be split into partitions in FPGA devices. In order to minimize resources, each o...
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
— We present a field programmable gate array (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA developed thi...
Michael K. Cheng, Bruce E. Moision, Jon Hamkins, M...
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...