165 search results - page 8 / 33 » fpga 2009 |
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...
FCCM
2009
IEEE
14 years 4 months ago
2009
IEEE
This paper will describe the architecture of a compiler which will convert an untimed C description of a set of floating point expressions into a synthesizable datapath optimized ...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
FCCM
2009
IEEE
14 years 1 months ago
2009
IEEE
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
A simple image-processing application is implemented on the Ambric MPPA and an FPGA, using a similar implementation for both devices. FPGAs perform extremely well on this kind of ...