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FPL
2003
Springer
130views Hardware» more  FPL 2003»
14 years 1 months ago
Communication Costs Driven Design Space Exploration for Reconfigurable Architectures
In this paper we propose a design space exploration method targeting reconfigurable architectures that takes place at the algorithmic level and aims to rapidly highlight architect...
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
FPL
2003
Springer
146views Hardware» more  FPL 2003»
14 years 1 months ago
Domain-Specific Reconfigurable Array for Distributed Arithmetic
Distributed Arithmetic techniques are widely used to implement Sum-of-Products computations such as calculations found in multimedia applications like FIR filtering and Discrete Co...
Sami Khawam, Tughrul Arslan, Fred Westall
FPL
2003
Springer
74views Hardware» more  FPL 2003»
14 years 1 months ago
Reconfigurable Circuits Using Hybrid Hall Effect Devices
Abstract. Hybrid Hall effect (HHE) devices are a new class of reconfigurable logic devices that incorporate ferromagnetic elements to deliver nonvolatile operation. A single HHE de...
Steve Ferrera, Nicholas P. Carter
FPL
2003
Springer
115views Hardware» more  FPL 2003»
14 years 1 months ago
Programmable Asynchronous Pipeline Arrays
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
John Teifel, Rajit Manohar
FPL
2003
Springer
136views Hardware» more  FPL 2003»
14 years 1 months ago
FPGAs for High Accuracy Clock Synchronization over Ethernet Networks
This article describes the architecture and implementation of two systems on a programmable chip, which support high accuracy clock synchronization over Ethernet networks. The netw...
Roland Höller