The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...
This paper describes methods and tools that have been used for teaching disciplines dedicated to the design of reconfigurable digital systems. It demonstrates students' projec...
This paper describes the implementation of the L3 maze routing accelerator in an FPGA. L3 supports fast single-layer and multi-layer routing, preferential routing, and rip-up-and-r...
The use of FPGAs for cryptographic applications is highly attractive for a variety of reasons but at the same time there are many open issues related to the general security of FPG...
Abstract. A smart transducer network hosts various nodes with different functionality. Our approach offers the possibility to design different smart transducer nodes as a system...
Martin Delvai, Ulrike Eisenmann, Wilfried Elmenrei...