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GLVLSI
2000
IEEE
14 years 2 months ago
2000
IEEE
In this paper we present a novel and fast estimation technique that produces tight latency lower bounds for Data Flow Graphs representing time critical segments of the application...
GLVLSI
2000
IEEE
14 years 2 months ago
2000
IEEE
Symbolic Model checking is a widely used technique in sequential verification. As the size of the OBDDs and also the computation time depends on the order of the input variables,...
GLVLSI
2000
IEEE
14 years 2 months ago
2000
IEEE
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Various coding schemes have been proposed in literature to encode the input signal...
GLVLSI
2000
IEEE
14 years 2 months ago
2000
IEEE
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
GLVLSI
2000
IEEE
14 years 2 months ago
2000
IEEE
— Typically, placement algorithms attempt to minimize the total net length of a printed circuit board (PCB). However, an MCM’s increased throughput and dense circuitry can easi...