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ICCAD
2003
IEEE
132views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Sum-over-Paths Impulse-Response Moment-Extraction Algorithm for IC-Interconnect Networks: Verification, Coupled RC Lines
We have created a stochastic impulse-response (IR) momentextraction algorithm for RC circuit networks. It employs a newly discovered Feynman Sum-over-Paths Postulate. Full paralle...
Yannick L. Le Coz, Dhivya Krishna, Dusan M. Petran...
ICCAD
2003
IEEE
149views Hardware» more  ICCAD 2003»
14 years 6 months ago
Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module L
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhij...
GLVLSI
2003
IEEE
175views VLSI» more  GLVLSI 2003»
14 years 2 months ago
A custom FPGA for the simulation of gene regulatory networks
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
Ilias Tagkopoulos, Charles A. Zukowski, German Cav...
IOLTS
2003
IEEE
133views Hardware» more  IOLTS 2003»
14 years 2 months ago
Power Consumption of Fault Tolerant Codes: the Active Elements
On-chip global interconnections in very deep submicron technology (VDSM) ICs are becoming more sensitive and prone to errors caused by power supply noise, crosstalk noise, delay v...
Daniele Rossi, Steven V. E. S. van Dijk, Richard P...
ITC
2003
IEEE
197views Hardware» more  ITC 2003»
14 years 2 months ago
Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA)
A scalable laser-based timing analysis technique we call laser assisted device alteration (LADA) is introduced for the rapid isolation and analysis of defect-free performance limi...
Jeremy A. Rowlette, Travis M. Eiles