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ITC
2003
IEEE
136views Hardware» more  ITC 2003»
14 years 2 months ago
Adapting JTAG for AC Interconnect Testing
The use of AC coupled interconnects to provide communication paths between devices is increasing. The existing IEEE 1149.1 boundary scan standard [1] (JTAG) has limitations that h...
Lee Whetsel
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 2 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
AAAI
2010
13 years 10 months ago
A Two-Dimensional Topic-Aspect Model for Discovering Multi-Faceted Topics
This paper presents the Topic-Aspect Model (TAM), a Bayesian mixture model which jointly discovers topics and aspects. We broadly define an aspect of a document as a characteristi...
Michael Paul, Roxana Girju