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iccad 2005
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Storage assignment during high-level synthesis for configurable architectures
16 years 1 months ago
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Wenrui Gong, Gang Wang, Ryan Kastner
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Dynamic voltage scaling for the schedulability of jitter-constrained real-time embedded systems
16 years 1 months ago
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Bren Mochocki, Razvan Racu, Rolf Ernst
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Embedded tutorial: formal equivalence checking between system-level models and RTL
15 years 10 months ago
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Alfred Koelbl, Yuan Lu, Anmol Mathur
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Simulation-based bug trace minimization with BMC-based refinement
15 years 10 months ago
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Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
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Discrete Vt assignment and gate sizing using a self-snapping continuous formulation
16 years 1 months ago
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Saumil Shah, Ashish Srivastava, Dushyant Sharma, D...
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