This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on onchip decompression and comparison of incompletely specified test ...
Scott Ollivierre, Adam B. Kinsman, Nicola Nicolici
This paper shows that by creating functional scan chains at the register-transfer level (RTL), not only the timing of the circuit can be improved, but also the test data compressi...
Wire pipelining has been proposed as a viable mean to break the discrepancy between decreasing gate delays and increasing wire delays in deep-submicron technologies. Far from bein...
This paper will present a solution to eliminate the requirements of sorting by prefix length in IP forwarding devices using Ternary Content Addressable Memories (TCAMs). This will...