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ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
14 years 4 months ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
ISCC
2006
IEEE
128views Communications» more  ISCC 2006»
14 years 4 months ago
Adjacent 2-Route Flow Approach for Restorable Dynamic Routing in MPLS Networks
In this paper we focus on issues of restorable dynamic routing in MPLS networks. We assume that the considered MPLS network must provide reliable service including restorable rout...
Krzysztof Walkowiak
ISVLSI
2006
IEEE
89views VLSI» more  ISVLSI 2006»
14 years 4 months ago
System Exploration of SystemC Designs
Due to increasing design complexity new methodologies for system modeling have been established in VLSI CAD. The SystemC methodology gains a significant reduction of design cycle...
Christian Genz, Rolf Drechsler
IV
2006
IEEE
97views Visualization» more  IV 2006»
14 years 4 months ago
Towards Ubiquitous Brushing for Information Visualization
Brushing is a collection of techniques to dynamically query and directly select elements on the visual display. Such interaction allows the user to explore the visualization, to i...
Jonathan C. Roberts, Michael A. E. Wright
IWIA
2006
IEEE
14 years 4 months ago
The LAIDS/LIDS Framework for Systematic IPS Design
The recent outbreaks of extremely fast spreading worms highlight the inadequacy of the current patching approach. Intrusion prevention systems (IPSs) that automatically generate a...
Simon P. Chung, Aloysius K. Mok