alization of large volumes of abstract information requires mechanisms to support the user by knowledge discovering. Therefore we developed the level of data Therein the abstract ...
Load latency remains a significant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Pred...
: The Time-Triggered (TT) model of computation is a model for the representation and analysis of the design of large hard real-time systems. Central to this model is the concept of...
This paper presents a new design assistant for analog integrated circuits. The interactive tool is implemented in the Design Framework II of Cadence and supports the designer d...
We describe the speech-enabling approach to building auditory interfaces that treat speech as a first-class modality. The process of designing effective auditory interfaces is de...