—Behavioral modeling with virtual built-in self-test verification of high-speed wired link designs is described in this paper. Our procedure is based on principles of top-down mi...
— We present analytical formulas for the calculation of the memory requirements for a system using the Complex Logarithmic Number System (CLNS). Certain properties of the CLNS ad...
This paper presents an approach to analyzing Edge Dummy and modeling of gated-oscillator (GO) -based CDRs and D.e.te...r G.t.. predicting their performance aspects such as jitter t...
Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi,...
— This paper analyzes the behavior of interconnects in the highly structured environment of a network-on-chip (NoC). Two distinct classes of wires are considered, namely links be...
— We describe a potentiostat designed for in situ electrochemical control of MEMS actuators. This module is tailored for integration into a hybrid CMOS-MEMS system-ona-chip to co...
S. B. Prakash, Pamela Abshire, M. Urdaneta, M. Chr...