Sciweavers

53 search results - page 6 / 11
» isca 2009
Sort
View
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
14 years 5 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 5 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
14 years 5 months ago
ECMon: exposing cache events for monitoring
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
Vijay Nagarajan, Rajiv Gupta
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
14 years 5 months ago
Memory mapped ECC: low-cost error protection for last level caches
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
Doe Hyun Yoon, Mattan Erez
ISCA
2009
IEEE
150views Hardware» more  ISCA 2009»
14 years 5 months ago
Stream chaining: exploiting multiple levels of correlation in data prefetching
Data prefetching has long been an important technique to amortize the effects of the memory wall, and is likely to remain so in the current era of multi-core systems. Most prefetc...
Pedro Diaz, Marcelo Cintra