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ISLPED
2003
ACM
87views Hardware» more  ISLPED 2003»
14 years 1 months ago
On load latency in low-power caches
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional late...
Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Ir...
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
14 years 1 months ago
Power efficient comparators for long arguments in superscalar processors
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 1 months ago
ILP-based optimization of sequential circuits for low power
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
Feng Gao, John P. Hayes
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
14 years 1 months ago
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle co...
Dongkun Shin, Jihong Kim
ISLPED
2003
ACM
90views Hardware» more  ISLPED 2003»
14 years 1 months ago
Low cost instruction cache designs for tag comparison elimination
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
Youtao Zhang, Jun Yang 0002