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ITC
1995
IEEE
98views Hardware» more  ITC 1995»
13 years 11 months ago
Improved Boundary Scan Design
Lee Whetsel
ITC
1995
IEEE
116views Hardware» more  ITC 1995»
13 years 11 months ago
An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design
An experiment has been designed to evaluate multiple testing techniques for combinational circuits. To perform the experiment, a 25k gate CMOS Test Chip has been designed, manufac...
Piero Franco, William D. Farwell, Robert L. Stokes...
ITC
1995
IEEE
124views Hardware» more  ITC 1995»
13 years 11 months ago
An Experimental Chip to Evaluate Test Techniques: Experiment Results
This paper describes the testing of a chip especially designed to facilitate the evaluation of various test techniques for combinational circuitry. The different test sets and tes...
Siyad C. Ma, Piero Franco, Edward J. McCluskey