Creating functional tests that work on an ATE has always been a significant challenge [1]. This paper identifies the fundamental mechanisms for functional test failures of an SOC ...
This paper proposes an architecture for implementing a self-checking 4-bit carry select adder that can be extended to any n-bit addition. The overhead is directly proportional to ...
The custom testability strategy of the Alpha 21364, Hewlett-Packard’s most recent Alpha microprocessor, builds upon its Alpha 21264 embedded core. Several additional DFT feature...
Scott Erlanger, Dilip K. Bhavsar, Richard A. Davie...
This paper describes an Addressable Shadow Protocol device that is capable of providing connectivity between a backplane resident IEEE 1149.1 test bus master and a plurality of 11...
This paper describes a method for automatically generating diagnostic programs for mixed-signal load boards. This procedure employs a statistical method of computing Mahalanobis D...
Kranthi K. Pinjala, Bruce C. Kim, Pramodchandran N...