Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
In the 1990s and early 2000s several papers investigated the relative merits of polynomial-basis and normal-basis computations for F2n . Even for particularly squaring-friendly app...
In this paper, we investigate the data access patterns and file I/O behaviors of a production cosmology application that uses the adaptive mesh refinement (AMR) technique for it...
Jianwei Li, Wei-keng Liao, Alok N. Choudhary, Vale...
Abstract—Transmission of digital contents in unavoidable noiseprone environments demands sophisticated error detection and concealment techniques to restore the perceptual qualit...