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DATE
2007
IEEE
113views Hardware» more  DATE 2007»
15 years 10 months ago
Congestion-controlled best-effort communication for networks-on-chip
Abstract. Congestion has negative effects on network performance. In this paper, a novel congestion control strategy is presented for Networks-on-Chip (NoC). For this purpose we in...
Jan Willem van den Brand, Calin Ciordas, Kees Goos...
NOCS
2007
IEEE
15 years 10 months ago
Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances
In this paper we present a new clustered mesh FPGA architecture where each cluster local interconnect is implemented as an MFPGA tree network [6]. Unlike previous clustered mesh a...
Zied Marrakchi, Hayder Mrabet, Christian Masson, H...
NOCS
2007
IEEE
15 years 10 months ago
NoC-Based FPGA: Architecture and Routing
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
Roman Gindin, Israel Cidon, Idit Keidar
ASAP
2007
IEEE
95views Hardware» more  ASAP 2007»
15 years 10 months ago
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
Sumit D. Mediratta, Jeffrey T. Draper
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 10 months ago
A multi-core debug platform for NoC-based systems
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
Shan Tang, Qiang Xu