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PDP
2010
IEEE
14 years 2 months ago
Impact of Parallel Workloads on NoC Architecture Design
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
Henrique Cota de Freitas, Lucas Mello Schnorr, Mar...
TCAD
2010
160views more  TCAD 2010»
13 years 2 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Improved on-chip router analytical power and area modeling
Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence o...
Andrew B. Kahng, Bill Lin, Kambiz Samadi
NOCS
2010
IEEE
13 years 5 months ago
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs
The number of cores present on-chip is increasing rapidly. The on-chip network that connects these cores needs to scale efficiently. The topology of on-chip networks is an importan...
Chia-Hsin Owen Chen, Niket Agarwal, Tushar Krishna...
DAC
2010
ACM
13 years 9 months ago
Network on chip design and optimization using specialized influence models
In this study, we propose the use of specialized influence models to capture the dynamic behavior of a Network-onChip (NoC). Our goal is to construct a versatile modeling framewor...
Cristinel Ababei